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== PCIe == [https://www.kernel.org/doc/html/v4.14/driver-api/uio-howto.html#generic-pci-uio-driver] generic pci driver [https://www.osadl.org/fileadmin/dam/rtlws/12/Koch.pdf] paper on memory mapping pci [https://unix.stackexchange.com/questions/219920/linux-userspace-pci-driver-options-uio-pci-generic] interesting search for pci memory map options (includes uio_pci_generic) Code lives in "./kernel/msm-3.18/drivers/uio" Useful commands lspci -k ls /sys/class/uio ls /sys/bus/pci Vendor Id 0x1172 Class Code 0x00058000 harrier:/ $ lspci -k 00:00.0 Class 0604: 17cb:0104 01:00.0 Class 0280: 168c:003e cnss_wlan_pci 00:00.0 Class 0604: 17cb:0104 01:00.0 Class 0604: 10b5:8604 02:01.0 Class 0604: 10b5:8604 02:04.0 Class 0604: 10b5:8604 02:05.0 Class 0604: 10b5:8604 <span style="background:yellow">03:00.0 Class 0580: 1172:0000</span> 04:00.0 Class 0200: 1969:1083 atl1c Loaded drivers: harrier:/ $ ls -l /sys/bus/pci/drivers total 0 drwxr-xr-x 2 root root 0 2020-03-26 11:33 atl1c drwxr-xr-x 2 root root 0 2020-03-26 11:33 cnss_wlan_pci drwxr-xr-x 2 root root 0 2020-03-26 11:33 dwc3-pci drwxr-xr-x 2 root root 0 2020-03-26 11:33 ehci-pci drwxr-xr-x 2 root root 0 2020-03-26 11:33 mhi_pcie_drv drwxr-xr-x 2 root root 0 2020-03-26 11:33 xhci_hcd Resource file: cat /sys/bus/pci/devices/0002\:03\:00.0/ (or) cat /sys/class/pci_bus/0002\:03/device/0002\:03\:00.0/resource 0x000000000e400000 0x000000000e400fff 0x000000000014220c 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000e800000 0x000000000effffff 0x000000000014220c 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 [https://lore.kernel.org/patchwork/patch/605108/] uio_pci_generic mod to support memory mapping [https://stackoverflow.com/questions/38921463/linux-kernel-4-7-arch-arm64-does-not-create-resource0-file-in-sys-bus-pci-d] issue mapping resource0 file [http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/359435.html] arm64 add support for pci_mmap_page_range This last link got the resource0 files to show up adding in the pci_mmap_page_range. Things still crash badly when I access, but I just need to test a single word read and see if that works. === Modify system boot config, remove uio_pci_generic driver config === adb root adb disable-verity adb reboot adb root adb remount adb shell mv /system/etc/uio_pci_setup.sh /system/etc/uio_pci_setup.sh.bak adb shell sync adb reboot === Now with Rich's latest fpga === cat resource < 0x000000000e540000 0x000000000e543fff 0x000000000014220c 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000e500000 0x000000000e53ffff 0x000000000014220c 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 Running the kynetics test app yeilds: 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[0] = 0xdeadbeef 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[1] = 0xdcba0040 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[2] = 0x7091246 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[3] = 0x196f0020 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[4] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[5] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[6] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[7] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[8] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[9] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[10] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[11] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[12] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[13] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[14] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[15] = 0x0 2020-10-13 11:10:34.275 3554-3554/com.viken.pcietest I/pcieLib: data[16] = 0x0 Notes from Rich's email July 9, 2020 The memory that I have provided for the PCIE interface is: Memory 1: BAR0 Configuration/monitor/status memory 16384 bytes or from your end 2048 64bit words Address 0000_0000 ο 0000_3fff Memory 2: BAR2 Data buffers - 262144 bytes or from you end 32768 - 64bit words Address 0000_0000 ο 0003_ffff Configuration/monitor/status Memory addressing (16 bit data word): Address 0 byte 1/0 <= whoami; βbeefβ Address 0 byte 3/2 <= reg_ver; βdeadβ Address 0 byte 5/4 <= brd_ver; ? Address 0 byte 7/6 <= 16'hdcba; Address 1 byte 1/0 <= comp_time; βh1246 Address 1 byte 3/2 <= comp_date; βh0709 Address 1 byte 5/4 <= comp_year; βh0020 Address 1 byte 7/6 <= time_date; βh196f (I think) The following memory locations have the data pointers for the last memory location written to. Address 2 byte 1/0 <= pcie_mem2_wr_pntr_a[15:0]; Address 2 byte 3/2 <= pcie_mem2_wr_pntr_a[31:16]; Address 2 byte 5/4 <= pcie_mem2_wr_pntr_b[15:0]: Address 2 byte 7/6 <= pcie_mem2_wr_pntr_b[31:16]; Address 3 byte 1/0 <= pcie_mem2_wr_pntr_c[15:0]; Address 3 byte 3/2 <= pcie_mem2_wr_pntr_c[31:16]; Address 3 byte 5/4 <= pcie_mem2_wr_pntr_d[15:0]: Address 3 byte 7/6 <= pcie_mem2_wr_pntr_d[31:16];
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